Alphawave Semi Highlights Why the Next Gen of AI Advances Demand Chiplet Architectures at EE Times

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Alphawave Semi, a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure, has announced four of its technical experts have been invited to present on building chip for the AI era at EE Times Presents: The Future of Chiplets.

Beginning July 30, and live-streamed on chiplets.eetimes.com, the two-day free event seeks to advance the industry’s knowledge on the realities of working with and building chiplet-based systems for AI. The event will bring many of the industry’s leading experts together – including those from Arm, Cadence, Siemens EDA, and Semi – and seeks to show how chiplet-based architectures enable enhanced performance, reduced transmission bottlenecks, better yields and lower costs versus monolithic ICs.

It will be hosted and moderated by EE Times’ Editor in Chief and Senior AI Reporter, Nitin Dahad, and Sally Ward-Foxton, respectively.

Letizia Giuliano, Vice President of IP Product Marketing and Management at Alphawave Semi, said, “As the demand for faster, more efficient data movement continues to grow, traditional chip designs are reaching their limits. At Alphawave Semi, we’re driving innovation with advanced chiplet architectures and next-generation connectivity solutions—both electrical and optical—that unlock higher performance and energy efficiency.

“Our presentations will highlight how these technology advancements are shaping the future of high-speed computing and data infrastructure.”

How to view the presentations

All panel discussions and presentations will be streamed live and for free following registration. To register and view the event’s full agenda.

Scaling AI Compute with Next Generation of UCIe Die-to-Die Interface Enabled Chiplets

July 30: (9:55 AM Pacific, 12:55 PM Eastern, 5:55 PM UK, 6:55 PM CEST)

Mike Klempa, Principal Engineer, Alphawave Semi

Chiplet Advantages with Ethernet and PCIe Scaling Across Copper and Optics

July 30: (11:50 AM Pacific, 2:50 PM Eastern, 7:50 PM UK, 8:50 PM CEST)

Sue Hung Fung, Principal Product Line Manager, Alphawave Semi

Evolution of HBM (High Bandwidth Memory) in the Chiplet Ecosystem Era

July 31: (10:00 AM Pacific, 1:00 PM Eastern, 6:00 PM UK, 7:00 PM CEST)

Archana Cheruliyil, Principal Product Marketing Manager, Alphawave Semi

Panel Discussion: Enabling New Design Directions

July 31: (10:55 AM Pacific, 1:55 PM Eastern, 6:55 PM UK, 7:55 PM CEST)

Letizia Giuliano, VP of IP Product Marketing and Management, Alphawave Semi; Vladimir Stojanovic, CTO and Co-Founder, Ayar Labs; Ramin Farjadrad, founding CEO, Eliyan; Ritesh Jain, SVP of Engineering and Operations, Lightmatter

Moderated by Sally Ward-Foxton, Senior Reporter, EE Times.

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