To address the requirement of designing extremely complex semiconductor chips with aggressive schedules, highly competitive design targets, and few design experts, Cadence has launched Cadence Cerebrus AI Studio. It is the industry’s first agentic AI multi-block multi-user design platform, significantly accelerating an entire system-on-chip’s (SoC) time to market by 5X.
Recent technological advancements have led to semiconductor chips with intricate functionalities requiring trillions of transistors. These chips must support high-performance computing and be designed using advanced process nodes. Cadence Cerebrus AI Studio is a state-of-the-art SoC agentic AI design implementation tool that can help achieve ambitious power, performance, and area (PPA) goals and reduce turnaround time (TAT) for highly sophisticated chips.
Cadence Cerebrus AI Studio is aligned with Cadence’s Intelligent System Design strategy. For block-level AI-driven optimization, Cadence Cerebrus Intelligent Chip Explorer was released in 2021 and has successfully been used in hundreds of production designs. Cadence Cerebrus AI Studio is the next generation of AI-driven digital implementation products using the most advanced agentic AI technology for implementing an entire SoC or subsystem, enabling a generational shift from multiple designers optimizing a single block to multiple blocks being designed by a single engineer.
Utilizing the latest agentic AI system that features autonomous AI agents capable of making decisions and taking multi-step actions based on high-level objectives, Cadence Cerebrus AI Studio can orchestrate the complete chip implementation flow delivering engineering productivity benefits. The Innovus+ integrated RTL synthesis and implementation platform, including Python scripting and a large language model (LLM) AI assistant, provides completely automated design realization.
Key features of Cadence Cerebrus AI Studio include:
- Intelligent Agentic AI Workflows: Employs AI agents that manage design optimization methodologies, resulting in unparalleled PPA and accelerated design closure.
- Multi-Block, Multi-User Design Infrastructure: A central design platform empowers a single engineer to design multiple blocks, allowing for more µm2 of SoC implementation per engineer.
- Hierarchical Design Optimization: Top-block co-optimization using AI greatly reduces manual work and enables faster design closure.
- Advanced Data Analytics: AI-driven data platform facilitates smarter and faster design debug by quickly identifying bottlenecks and critical paths.
- Customizable Live Dashboard: Facilitates collaboration and knowledge sharing across designs and projects, resulting in exponential productivity benefits.
Early customers utilizing Cadence Cerebrus AI Studio have reported significant PPA and productivity benefits on advanced SoCs on most advanced-process nodes.
“Samsung Semiconductor India Research (SSIR) is an innovative powerhouse and believes in growing together by deploying industry-leading technologies and solutions,” explains Balajee Sowrirajan, corporate EVP and MD, Samsung Semiconductor India Research (SSIR). “As a part of our long-term partnership with Cadence, with the use of Cadence Cerebrus AI Studio, we are able to achieve PPA improvement of about 8% to 11% on SoC subsystems. We leveraged multiple features this tool offers, like a live design dashboard for ease of tracking, advanced data analytics for analyzing congestion, timing, clock tree, and more. We use the smart model replay to transfer learning across designs, leading to faster design convergence. Overall, this system has enabled significant productivity gains, and we are hoping to scale this as we explore many more features of this tool and continue our partnership with Cadence.”
Moussa Belkhiter, vice president, MDRF Central R&D Group, at STMicroelectronics, said: “We needed cutting-edge chip design methodology for automotive microcontroller designs to accelerate time to market. Cadence Cerebrus AI Studio provides an infrastructure that enables our engineers to optimize multiple designs of a SoC subsystem within one platform, giving seamless access to AI-driven optimization engine for improved PPA, advanced data analytics for faster debug, smart Machine Learning Model management for transfer of learning across designs, and live customizable design dashboard to compare metrics and quickly identify bottlenecks. As a global semiconductor leader, we have been a long-time user of Cadence’s Digital implementation tools, and we look forward to exploring the rich feature set of Cadence Cerebrus AI Studio for hierarchical design optimization to meet our business objectives.”
Further showcasing its impact, Benny Kaitbian, senior vice president, Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) notes, “We are a center of excellence for high-performing computing devices, requiring us to use the most efficient ways to implement chip design. With Cadence Cerebrus AI Studio, a few engineers at SARC could optimize multiple blocks, which demonstrates the promise of game-changing productivity gains. This tool offers a multitude of features like the live Customizable Dashboards that enable easy comparison across multiple runs, the smart model replay that identifies the best available models to optimize the design, Base vs. Best scenario selection, and many more advanced data analytics debugging techniques for better design closure. Cadence Cerebrus AI Studio gave us an overall productivity improvement of 4X and is a valuable addition to our design methodology.”
“We are thrilled to launch Cadence Cerebrus AI Studio, the industry’s first agentic AI SoC design platform, built on the solid foundation of established Cadence digital implementation tools. This tool extends the AI technology to hierarchical SoC design implementation, exponentially multiplying the PPA and productivity gains while addressing the engineering workforce shortage,” says Chin-Chi Teng, senior vice president and general manager, Digital & Signoff Group at Cadence. “Cadence Cerebrus AI studio, which leverages the latest agentic AI technology, is very well equipped to achieve unparalleled PPA, fastest time to design targets, and game-changing engineering efficiency.”
