PICMG improves COM-HPC “Mini” with Carrier Design Guide Rev 2.2


PICMG, a consortium for open hardware specifications, has released revision 2.2 of the COM-HPC Carrier Design Guide. This comprehensive document contains interface schematics, diagrams, design rules and requirements, and more for PCB layout engineers and hardware developers looking to create application-specific carrier boards that pair with COM-HPC modules.

Revision 2.2 of the Design Guide includes updates to address the new COM-HPC 2.1 specification, nicknamed COM-HPC Mini, which is the 95 mm x 70 mm platform that uses one less connector compared to its fellow COM-HPC form factors, but still delivers 400 pins for carrying high-speed signals from the processor module to carrier boards.

“Designing a carrier board can be a complex and time-consuming process, but the COM-HPC Design Guide helps streamline that process” says Peter Hunold, head of hardware engineering at Kontron Europe GmbH and editor of the COM-HPC working group. “It serves as an excellent complement to the COM-HPC base specification, as well as, for revisions like COM-HPC 2.1 that introduced the new “Mini” form factor and vendor documentation.”

What’s New in COM-HPC Carrier Design Guide Revision 2.2

Revision 2.2 of the Carrier Board Design Guide primarily focuses on the COM-HPC Mini, a small form factor expansion of the COM-HPC standard first announced in 2022. This new guide clarifies the differences between COM-HPC Client and COM-HPC Mini carrier board requirements, with examples that illustrate modifications necessary to move from Client- to Mini-compatible designs.

The Design Guide 2.2 release also introduces information on the Intel

JHL9040R USB4 Retimer, which replaces the JHL8040R in Rev 2.1. In addition to updated references, the document includes Intel JHL9040R block diagrams for both COM-HPC Client and COM-HPC Mini designs.

“Designing hardware to support new and emerging workloads is becoming progressively more challenging. Open standards such as COM-HPC help businesses overcome those challenges,” says Christian Eder, director of market intelligence at congatec. “They considerably reduce time-to-market for even the most sophisticated applications, especially with documentation to streamline the design process.”