Today as part of its MWC 2021 virtual event, Intel showcased multiple groundbreaking network deployments powered by its technology and unveiled the Intel Network Platform. It also announced new additions to its leading product portfolio for 5G and edge, reaffirming its position as the leading network silicon provider. The company confirmed its leadership in virtual radio access network (vRAN), noting nearly all commercial vRAN deployments are running on Intel technology. In the years ahead, it sees global vRAN base station deployments scale, from hundreds to “hundreds of thousands,” and eventually millions.
“Network transformation is critical to unleash the possibilities of 5G and maximize the rise of the edge to create new and better business outcomes for our customers across the globe. As the leading network silicon provider, we have been driving this shift to virtualizing the core to access to edge, and implementing edge computing capabilities with our decade of experience, to power our society’s digital revolution.”–Dan Rodriguez, Intel corporate vice president, Network Platforms Group
Why It Matters: Operators desire a more agile, flexible infrastructure to unleash the full possibilities of 5G and edge as they address increased network demands from more connected devices. At the same time, the digitalization of our world is creating new opportunities to use the potential of 5G, edge, artificial intelligence (AI) and cloud to reshape industries ranging from manufacturing to retail, healthcare, education and more. According to a recent survey of 511 information technology decision-makers, 78% believe 5G technology is crucial to keep pace with innovation.
These decision-makers also revealed that they view edge as one of the top three use cases for 5G in the next two years. With Intel’s expansive portfolio delivering feature-rich silicon and optimized software solutions, the company can tap into an estimated $65 billion edge silicon opportunity by 2025. Intel technology is already deployed in over 35,000 end customer edge implementations.